Due to a physical structure, a semiconductor memory such as a NAND type flash memory is worn and reaches the end of its life at a predetermined number of times of rewriting. In such a semiconductor memory, in order to lengthen the life, a wear leveling process for leveling the degree of wear among blocks is performed. In wear leveling control, for example, data is exchanged between a block having a small number of times of rewriting (the number of times of erasing) and a block having a large number of times of rewriting.
The tolerance of each memory cell to rewriting has a variation between packages, chips, and blocks, and data retention with higher reliability is requested.